On the Behavior of Input Queuing Switch Architectures

Many proposals of input queuing cell switch architectures have recently appeared in the literature. Some have found application in commercial very high speed IP routers. In this paper we discuss the pros and cons of input and output queuing switch architectures, we provide a taxonomy of scheduling algorithms for input queuing switches, and we present comparative performance results for some of the recent proposals of input queuing cell switches. Performance is measured in terms of cell loss probability, as well as average, standard deviation, and 99-th quantile of the cell delay with different traffic patterns. The complexity of the algorithms, and the amount of control information to be exchanged inside the switch for their execution, are also discussed.